- E-mail.jihwanan@postech.ac.kr
- Website.sites.google.com/view/enterlab
- Degree.Ph.D. Stanford (2013)
- Lab.Energy-NanoTech Integrated Design & Manufacturing Laboratory
At ENTeR Lab (Energy-NanoTech Integrated Design and Manufacturing Research Laboratory), we study the underlying mechanisms of next-generation energy conversion and storage devices, and investigate engineering solutions to overcome their performance limits through atomic-level interface processes.
In particular, we develop and apply mechanical engineering-based core technologies for equipment, modules, and processes for next-generation atomic-level processes that has high fundamental and practical impact and never been explored before.
The scope of ENTeR Lab's research can be widely applied to next-generation electrochemical energy devices (for example, solid oxide fuel/electrolysis cells), high-performance/durable electrochemical catalysts, and unconventional thin film electronic devices.
MAJOR RESEARCH ACHIEVEMENTS
- Development of ultra-thin flexible capacitor with low temperature plasma atomic layer processes and nanopatterning (record performance for flexible capacitor)
- Development of atomic layer deposited anode for methane-fueled SOFC with ultra-low PGM loading
- Development of catalytic electrodes with high activity and stability by using atomic layer deposition
- Development of thin film sandwich electrolyte for low-temperature SOFC with high ionic conductivity and mechanical stability
- Development of MEMS-based low temperature SOFC with record-high power density (1.3 W/cm2 @ 450C)
RESEARCH INTERESTS
- Convergence of novel energy and semiconductor technologies
- Interface/surface engineering of next-generation energy conversion and storage systems
- Next-generation atomic layer manufacturing processes and equipment (deposition/etching/patterning, plasma/light-enhanced, big-data driven)
- Atomic layer manufacturing processes for energy and electronic applications